1. Field of the Invention
The present invention relates to a method for fabricating a capacitor in a semiconductor memory device; and more particularly, to a method for fabricating a cylinder type capacitor capable of preventing a damage in a bottom structure disposed beneath the capacitor by forming a plurality of storage node contact plugs in a well type.
2. Description of Related Arts
As for a capacitor of a semiconductor memory device, both an outer wall and an inner wall of a cylinder type lower electrode function as electrodes. Accordingly, it is possible to improve a capacitance by increasing a surface area of the capacitor.
FIGS. 1A to 1D are cross-sectional views illustrating a conventional method for fabricating a capacitor in a semiconductor memory device.
Referring to FIG. 1A, an inter-layer insulation layer 110 is formed on a silicon substrate 100, and a plurality of storage node contact plugs 120 are formed on corresponding storage node contacts 115 formed by etching the inter-layer insulation layers 110. An etch stop layer 130 and a capacitor insulation layer 135 are formed on the above resulting substrate structure and then, predetermined portions of the etch stop layer 130 and the capacitor insulation layer 135 corresponding to the plurality of contact plugs 120 are etched, thereby forming a plurality of openings 140 for storage nodes. Herein, the capacitor insulation layer 135 is an oxide-based layer.
Referring to FIG. 1B, a storage node material 150 such as titanium nitride (TiN) and a sacrificial layer 160 are sequentially deposited on openings 140.
Referring to FIG. 1C, the storage node material 150 and the sacrificial layer 160 are subjected to a plasma blanket etch-back process and as a result, a plurality of storage nodes 155 are isolated. After a process for isolating the plurality of storage nodes 155, the sacrificial layer 160 is removed.
Referring to FIG. 1D, the plurality of cylinder type storage nodes 155 are formed by removing the capacitor insulation layer 135 with use of a chemical such as hydrofluoric acid (HF) or buffered oxide etchant (BOE). Subsequently, a dielectric layer 170 and a plate node 180 are formed.
However, in the course of forming the capacitor, there is a misalignment between the plurality of storage nodes which are lower electrodes and the plurality of storage node contact plugs. Accordingly, when the lower electrodes are formed by using a metal such as TiN and then, are dipped into the chemical such as HF or BOE to remove the capacitor insulation layer under a state that the misalignment is generated between the plurality of storage nodes and the plurality of storage node contact plugs, the TiN layer which is the lower electrode cannot properly serve a role as a blocking layer.
This result is because there generates a crack in the TiN layer during the step of controlling contents of titanium chloride (TiCl2) within the TiN layer.
Accordingly, during the dipping process for removing the capacitor insulation layer, a chemical path is created at the crack of the TiN layer and thus, the chemical such as HF or BOE is penetrated through the chemical path created by the misalignment between the plurality of storage nodes and the plurality of storage nodes contact plugs. Accordingly, because of the penetrated chemical, the plurality of storage node contact plugs or the oxide layer which is the inter-layer insulation layer is susceptibly damaged, thereby inducing various defects such as a single and dual bit failure, and a direct current (DC) failure, which further causes decrease in yields of semiconductor devices and a poor operation